The Xilinx Alveo SN1000 is the first SmartNIC offering software-defined hardware acceleration for all function offloads in a single platform. SN1000 SmartNICs directly offload CPU-intensive tasks to optimize networking performance, with an architecture that can accelerate a broad range of custom offloads at a line rate, including support for customer-built and third-party offloads.
The U25 SmartNIC platform is based on a powerful FPGA, enabling hardware acceleration and offload to happen inline with maximum efficiency while avoiding unnecessary data movements and CPU processing. The U25 programming model supports both high-level network programming abstractions such as HLS and P4, as well compute acceleration frameworks such as Vitis to enable both Xilinx and 3rd party accelerated applications.